A genuine design manufacturability checker for integrated circuit designers
نویسنده
چکیده
Until recently, integrated circuit design was based on the following contract between design andmanufacturing: designs are to follow a set of manufacturing-driven constraints (commonly known as ‘design rules’), and manufacturing is to meet the performance and yield targets in producing the specified design. This arrangement worked for many years until the designs of sub-100nmnodes came along, when the optical proximity effects started to affect systematic and parametric yields severely, despite ever-improving resolution enhancement technique (RET) methodologies.1 As a result, design rules were not manufacturable, and several design techniques—known collectively as design for manufacturing (DFM)—were deployed to attempt to restore the contract.
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